Current SSD package technology uses 8, 10, 16 or 20, etc NAND Flash chips in TSOP package on a single PCB with one die per TSOP. Although TSOP can accommodate much bigger die than micro-SD in terms of area, SSD also faces the same challenge as micro-SD as its capacity is limited to the number of dies each TSOP can hold. For example, if the maximum capacity offered in a single TSOP package is 128Gb (=16GB), SSD makers can use 8 TSOP to make a 128GB SSD. If SSD maker wishes to make a 256GB SSD, then 16 128Gb chips are needed. If we want to keep stay with 8 TSOP only, each chip will need to contain 256Gb. Neither is possible unless we can achieve finer geometries on each die or new breakthroughs in how we package stacked dies.

Because of the difficulties involved with further miniaturization from 4x nm onward, in order to continue to increase capacity without being impacted by the difficulties in process advancement, vendors can only turn to breakthroughs in packaging technology such as TSV (Through Silicon Via). TSV is different from conventional wirebond package technology in that it creates vias on the die either by etching or laser, then fill the vias with conducting materials such as copper, polysilicon, tungsten, etc, then finally stack the grinded dies together. TSV is especially advantageous to traditional wirebond because of its shorter signal path, faster data transmission rate, less noise and better performance – all are qualities that contribute to better data transfer between each NAND Flash die and the control IC in memory card application. Currently, major NAND Flash vendors such as Intel, Micron, Samsung, Toshiba, etc have all developed TSV package technology. DRAMexchange experts expect to see TSV to gain wider usage for higher capacity memory cards, USB drives, SSD, etc within the next 3 to 5 years.